1. Field of the Invention
The present invention relates to a signal output circuit arranged in a CMOS digital semiconductor integrated circuit and, more particularly, to a signal output circuit having a bipolar transistor in an output stage.
2. Description of the Related Art
In a digital semiconductor integrated circuit, when a load is driven by a large current, a signal output circuit having a Bi-CMOS (bipolar-complimentary MOS) arrangement is used.
FIG. 1 shows an example of a conventional Bi-CMOS signal output circuit. In the signal output circuit, reference numerals 31 and 32 denote p- or n-channel MOS transistors, the gates of which are commonly connected to an input terminal 33, and which perform switching operations in response to a signal from the input terminal 33; 34 and 35, pnp or npn bipolar transistors; 36 and 37, resistors for setting a base current; 38 and 39, pnp or npn output bipolar transistors, the collectors of which are commonly connected to an output terminal 40; and 41 and 42, resistors for absorbing excess base charges of the bipolar transistors 38 and 39.
An operation of the circuit will be described in brief. When a signal at the input terminal 33 is "H" level, the p-channel MOS transistor 31 is turned off, and the n-channel MOS transistor 32 is turned on. At this time, a base current is flowed into the pnp bipolar transistor 38 through the bipolar transistor 34 and the resistor 37, so that the transistor 38 is turned on, and the output terminal 40 is charged with a high-potential power supply voltage VCC. On the other hand, when the signal at the input terminal 33 is "L" level, the p-channel MOS transistor 31 is turned on, and the n-channel MOS transistor 32 is turned off. At this time, a predetermined value of the base current is flowed into the npn bipolar transistor 39 through the resistor 36 and the bipolar transistor 35, so that the transistor 39 is turned on, and the output terminal 40 is discharged to a low-potential power supply voltage VSS.
After supply of the base current to the transistor 38 is stopped, an excess base charge is absorbed by a node of the power supply voltage VCC through the resistor 41. On the other hand, after supply of the base current to the transistor 39 is stopped, an excess base charge is absorbed by a node of the power supply voltage VSS through the resistor 42. Therefore, a high-speed switching operation performed when the transistor 38 and 39 are turned off can be achieved.
In the above-described conventional circuit, in a case that a 2-mA output current is to be obtained from the output terminal 40 when a value of the high-potential power supply voltage VCC is 5 V, a resistance R of the resistor 36 is determined by the following equation, assuming that a current amplification factor hfe(Q39) of the bipolar transistor 39 is, e.g., 5 (since the transistor 39 is operated in a saturation region when it is in an ON state, the current amplification factor at this time is decreased as compared with the operation in a non-suturation region), and a current amplification hfe(Q35) of the bipolar transistor 35 is, e.g., 100 wherein Vf in the following equation is a base-emitter voltage of the npn or pnp bipolar transistor. ##EQU1##
As a result, the resistance of the resistor 36 becomes extremely large. Similarly, the resistance of the resistor 37 becomes extremely large. Note that the resistors 41 and 42 for absorbing base charges are normally set in values from 5 k1/3to 10 k1/3.
In the above-described signal output circuit, the resistances of the resistors 36 and 37 are extremely large, so that charge and discharge rates of parasitic capacitors of the bases of the transistors 34 and 35 are low. As a result, switching speeds of the output bipolar transistors 38 and 39 are decreased, so the output switching speed is decreased.
In addition, in the conventional circuit, the base charges of the output transistors 38 and 39 are absorbed by the resistors 41 and 42. As a result, when the output transistors 38 and 39 are turned on, wasteful currents not used as base currents are flowed into the resistors 41 and 42. Therefore, the base currents of the output transistors 38 and 39 are decreased by the wasteful currents, so that the turn-on speed of the output transistors is decreased, thereby further decreasing the output switching speed.